How to Design a Multistage Class a 1 Watt Amplifier

Practical Amplifier Circuits

Martin Plonus , in Electronics and Communications for Scientists and Engineers, 2001

EXAMPLE 5.5

A transistor in a multistage amplifier has parasitic capacitances C _be = 40 pF, C _bc − 5 pF, and C _ce . The combined output capacitance Cd, which is made up of C_ce and the input capacitance of the following stage, is C_d = 300 pF. Hence, given the size of C_d , we can ignore all stray capacitances except for C_d - If the load resistance is R _L = 10 kΩ, then using the high-frequency equivalent circuit of Fig. 5.9c , we obtain for the high-frequency cutoff f_h = 1/2πR _L C _d = 1/6.28 · 104 · 300 · 10⁻¹² = 53 kHz. This is a comparatively low cutoff frequency, and therefore this amplifier is only good for amplifying audio signals. For example, to amplify television signals, the upper half-power frequencyf_h must be in the megahertz range. A better transistor, for which C_d = 5 pF, would extend this to 5.3 MHz. Reducing R _L would also increase the high-frequency cutoff, but the voltage gain of the amplifier, which at midband is given by Aν = −g_mR_i , would then be reduced.

The high-frequency equivalent circuit of Fig. 5.9c is also valid for FET amplifiers because the AC equivalent circuits for FETs and for BJTs are similar.

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Optical Amplifiers for Next Generation WDM Networks: A Perspective and Overview

Atul Srivastava , John Zyskind , in Optically Amplified WDM Networks, 2011

1.2.4 Standardization of amplifiers

Amplifier designs ranging from simple single stage to more complex multistage amplifiers with variable gain evolved as a differentiator for system performance by equipment manufacturers and were initially made in-house. More recently, the equipment vendors outsourced the design and manufacturing of amplifiers to the component vendors while requiring more than one source in order to control cost and delivery risk. This led to a pseudo-standardization of optical amplifiers with three or four vendors making amplifiers with compatible optical, mechanical, electrical hardware, and software specifications. Geographically, however, the component suppliers from Japan and North America were predominant suppliers to the equipment vendors of their respective regions. This led to evolution of two major streams of amplifier products, broadly having distinct specifications, one in North America and the other in Japan.

The International Electrotechnical Commission (IEC) has recognized these trends and recently created standards for new characterization techniques such as transient measurement and optical amplifier module command sets. In an effort to standardize the various transient parameters across the industry, the transient measurement document also include definitions of the various parameters such as transient gain response time, gain overshoot, and gain offset. Similar standards are being developed for other measurements and physical interfaces of optical amplifier modules.

There has been considerable progress in the standardization of measurement techniques of optical amplifier parameters, but relatively little has been achieved on the standardization of the performance parameters. As described above, this is primarily because the network equipment manufacturers believe they will gain significant advantage and differentiation in transmission system performance by having a custom design of optical amplifiers. However, because of the requirement of multiple sourcing for amplifiers, there has been industry-wide pseudo-standardization, and as a consequence it has been possible to standardize the command set of the amplifier modules. Moreover, it has been realized that there is value in acceptance of common definition of agile amplifiers such as the transient characteristics and common measurement techniques which can be acceptable to both the WDM equipment vendors and component suppliers. An example of the EDFA transient parameters in the channel drop event as defined in an IEC document [10] is shown in Fig. 1.4, which defines the commonly used parameters like transient gain response, gain overshoot, and gain offset. Further progress is needed in this direction and will lead to overall cost reduction of manufacturing and testing of products. A brief snapshot of the recent activities and progress of the IEC SC86C Working Group on Optical Amplifiers is given below.

FIGURE 1.4. EDFA Transient parameter definition in the event of channel drop. [10]

Courtesy IEC

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Low-noise amplifier design

Clive Poole , Izzat Darwazeh , in Microwave Active Circuit Analysis and Design, 2016

14.6 Multistage low-noise amplifier design

In Section 13.4 , we explained how a required gain and bandwidth can be obtained by cascading several single stages. In the context of this chapter, cascading stages in this way raises the question of the relationship between the noise factor of a multistage amplifier and the noise factors of the individual stages.

One might intuitively expect that a minimum noise factor multistage amplifier could be constructed by simply cascading a number of individual stages each optimized for minimum noise factor. It turns out, however, that this approach does not result in the lowest overall noise factor for the cascade, due to the trade-off between noise factor and gain inherent in single-stage amplifier design, as outlined in the previous sections.

Figure 14.9 shows a cascade of single-stage amplifiers, with the nth stage having a noise factor F _n and available gain G _n.

Figure 14.9. Cascaded amplifiers.

It turns out that the overall noise factor of the multistage amplifier in Figure 14.9 depends not only on the noise factor of the individual stages but also on the gain of the individual stages. This is embodied in the so-called Friis noise formula which is named after its originator, Harald Friis [24], and can be stated as follows:

(14.6.1) $\begin{array}{l}\hfill F=F_1+\frac{F_2-1}{G_1}+\frac{F_3-1}{G_1{G}_2}+\cdots +\frac{F_{\mathrm{n}}-1}{G_1{G}_2{G}_3\dots G_{n-1}}\end{array}$

where

F = noise factor of the cascade;

F _n = noise factor of the nth stage; and

G _n = gain of the nth stage.

We can deduce the following by studying equation (14.6.1):

(i)

The noise factor of the first stage is much more important than the noise factors of subsequent stages, as these are divided by the gain of the preceding stages. This suggests that the first-stage noise factor should be made as small as possible.

(ii)

In order to make subsequent stage noise factors insignificant, the first-stage gain should be as high as possible.

It will be apparent that the requirements represented by statements (i) and (ii) above are mutually incompatible since, as was illustrated in Example 14.1, minimum noise figure and maximum gain do not normally occur at the same source termination. A compromise must therefore be struck between the gain and noise figure of each stage which results in the minimum overall noise figure for the cascade. This can be done by selecting a suitable source termination which is in general not equal to Γ_ms or Γ_on.

Consider the case of two stages that are to be cascaded. Let their noise figures be F ₁ and F ₂ and their available gains be G _A1 and G _A2. There are two possible arrangements as shown in Figure 14.10.

Figure 14.10. Two ways of cascading two amplifiers.

If stage 1 is placed first, as in Figure 14.10 (a), the overall noise factor of the cascade, from equation (14.6.1), will be:

(14.6.2) $\begin{array}{l}\hfill F_{12}=F_1+\frac{F_2-1}{G_{A1}}\end{array}$

On the other hand, if stage 2 is placed first, as in Figure 14.10 (b), the overall noise factor of the cascade, from equation (14.6.1) will be:

(14.6.3) $\begin{array}{l}\hfill F_{21}=F_2+\frac{F_1-1}{G_{A2}}\end{array}$

In general, one of these possibilities will result in a lower overall noise figure than the other. Suppose that putting stage 1 first results in the lowest overall noise figure, that is,

(14.6.4) $\begin{array}{l}\hfill F_{12}<F_{21}\end{array}$

Employing equations (14.6.2) and (14.6.3) results in:

(14.6.5) $\begin{array}{l}\hfill F_1+\frac{F_2-1}{G_{A1}}<F_2+\frac{F_1-1}{G_{A2}}\end{array}$

Equation (14.6.5) can be rearranged to give:

(14.6.6) $\begin{array}{l}\hfill \frac{F_1-1}{\left(1-1G_{A1}\right)}<\frac{F_2-1}{\left(1-1G_{A2}\right)}\end{array}$

Therefore, the lowest overall noise figure results from ensuring that the first stage has the lowest value, not of F, but of the quantity "M" which is defined by:

(14.6.7) $\begin{array}{l}\hfill M=\frac{F-1}{\left(1-1G_{\mathrm{A}}\right)}\end{array}$

The quantity M is therefore a more meaningful measure of stage noise performance than noise figure when stages are to be cascaded. It was first identified by Haus and Adler [25] who gave this quantity the name noise measure. If several stages with the same noise measure are cascaded then the noise measure of the cascade will be the same as that of each stage. For such a cascade the overall noise figure, assuming large enough stage gains, is given by:

(14.6.8) $\begin{array}{l}\hfill F=M+1\end{array}$

We can therefore conclude that, in order to build a multistage amplifier with the minimum overall noise factor, the first stage, and possibly subsequent stages, should be designed for minimum value of noise measure (i.e., $M_{min}$ ). We know that noise factor and available gain are functions of the source termination alone, so we deduce that the minimum noise measure can be obtained at a particular value of source termination.

We can determine the value of $M_{min}$ and the source termination required to realize it, which we shall refer to as Y _om (admittance) or Γ_om (reflection coefficient) by differentiating equation (14.6.7) with respect to the complex source termination (Y _S, Γ_S) and setting the derivatives equal to zero. Alternatively, we can derive circles of constant noise measure in the complex source plane and then consider the circle of zero radius.

Example 14.3 Noise figure of a receiver chain

Problem. Calculate the overall noise figure of the receiver chain shown inFigure 14.11, given the following noise figure and gain values for individual elements.

Figure 14.11. Overall noise figure of a receiver chain.

Solution. First, we convert the dB values in Table 14.2 into numerical ratios, as shown in Table 14.3.

Table 14.2. Receiver Chain Parameters

	RF Filter (dB)	RF Amp (dB)	Mixer (dB)	IF Filter (dB)	IF Amp (dB)
F dB	0.5	3	5	1	5
G dB	−0.5	12	−5	−1	18

Table 14.3. Receiver Chain Parameters (Numerical)

	RF Filter	RF Amp	Mixer	IF Filter	IF Amp
F	1.122	2.000	3.162	1.259	3.162
G	0.891	15.85	0.316	0.794	63.10

We now apply equation (14.6.1) using the values in Table 14.3:

$\begin{array}{ll}\hfill F=& 1.122+\frac{2.000-1}{0.891}+\frac{3.162-1}{0.891\times 15.85}+\hfill \\ \hfill & \frac{1.259-1}{0.891\times 15.85\times 0.316}+\frac{3.162-1}{0.891\times 15.85\times 0.316\times 0.794}\hfill \\ \hfill F=& 3.066\hfill \end{array}$

which is equal to F _dB = 4.87 dB.

14.6.1 Circles of Constant Noise Measure

As is the case when designing to meet a specific noise factor specification, as covered in Section 14.5.1, a graphical representation of the effect of variations in Γ_s on the noise measure of an amplifier is a useful design aid.

We will proceed to derive a set of equations for constant noise measure circles based on equation (14.6.7). We will employ the available gain equation equation (7.5.13) on page 226, that is:

(7.5.13) $\begin{array}{l}\hfill G_{\mathrm{A}}=\frac{|S_{21}{|}^2(1-|{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2)}{|1-S_{11}{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2-|S_{22}-\mathrm{\Delta }{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2}\end{array}$

Substituting equations (7.5.13) and (14.4.32), which are both functions only of Γ_S, into equation (14.6.7) and we have:

(14.6.9) $\begin{array}{l}\hfill M=\frac{(F_{min}-1)+4r_n\frac{|{\mathrm{\Gamma }}_{\mathrm{S}}-{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2}{|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(1-|{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2)}}{\left(1-\frac{|1-S_{11}{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2-|S_{22}-\mathrm{\Delta }{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2}{|S_{21}{|}^2(1-|{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2)}\right)}\end{array}$

Which can be rearranged as:

(14.6.10) $\begin{array}{l}\hfill M=\frac{|S_{21}{|}^2}{|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2}\times \frac{|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(1-|{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2)(F_{min}-1)+4r_n|{\mathrm{\Gamma }}_{\mathrm{S}}-{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2}{|S_{21}{|}^2(1-|{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2)-|1-S_{11}{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2+|S_{22}-\mathrm{\Delta }{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2}\end{array}$

Expanding out equation (14.6.10) and collecting Γ_S terms give:

(14.6.11) $\begin{array}{ll}\hfill & |{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2[M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|\mathrm{\Delta }{|}^2-|S_{21}{|}^2-|S_{11}{|}^2)-|S_{21}{|}^2(4r_n-|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1))]\hfill \\ \hfill & +{\mathrm{\Gamma }}_{\mathrm{S}}(M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2{C}_1+4r_n|S_{21}{|}^2{\mathrm{\Gamma }}_{\mathrm{on}}^{*})+{\mathrm{\Gamma }}_{\mathrm{S}}^{*}(M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2{C}_1^{*}+4r_n|S_{21}{|}^2{\mathrm{\Gamma }}_{\mathrm{on}})\hfill \\ \hfill & =|S_{21}{|}^2[|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1)+4r_n|{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2]-M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|S_{22}{|}^2+|S_{21}{|}^2-1)\hfill \end{array}$

Where C ₁ = S ₁₁ − S ₂₂*Δ.

Equation (14.6.11) can be rearranged to give:

(14.6.12) $\begin{array}{ll}\hfill & |{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2+{\mathrm{\Gamma }}_{\mathrm{S}}\left[\frac{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2{C}_1+4r_n|S_{21}{|}^2{\mathrm{\Gamma }}_{\mathrm{on}}^{*}}{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|\mathrm{\Delta }{|}^2-|S_{21}{|}^2-|S_{11}{|}^2)-|S_{21}{|}^2(4r_n-|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1))}\right]\hfill \\ \hfill & +{\mathrm{\Gamma }}_{\mathrm{S}}^{*}\left[\frac{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2{C}_1^{*}+4r_n|S_{21}{|}^2{\mathrm{\Gamma }}_{\mathrm{on}}}{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|\mathrm{\Delta }{|}^2-|S_{21}{|}^2-|S_{11}{|}^2)-|S_{21}{|}^2(4r_n-|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1))}\right]\hfill \\ \hfill & =\left[\frac{|S_{21}{|}^2[|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1)+4r_n|{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2]-M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|S_{22}{|}^2+|S_{21}{|}^2-1)}{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|\mathrm{\Delta }{|}^2-|S_{21}{|}^2-|S_{11}{|}^2)-|S_{21}{|}^2(4r_n-|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1))}\right]\hfill \end{array}$

Equation (14.6.12) is in the form:

(14.6.13) $\begin{array}{l}\hfill |{\mathrm{\Gamma }}_{\mathrm{S}}{|}^2+|C_{\mathrm{Sm}}{|}^2-{\mathrm{\Gamma }}_{\mathrm{S}}^{*}{C}_{\mathrm{Sm}}-{\mathrm{\Gamma }}_{\mathrm{S}}{C}_{\mathrm{Sm}}^{*}={\gamma }_{\mathrm{m}}^2\end{array}$

which describes a circle in the Γ_S plane with center at C _Sm and radius γ _Sm. From equation (14.6.12) we can see that the center of the constant M circle on the Γ_S plane is located at:

(14.6.14) $\begin{array}{l}\hfill C_{{\mathrm{S}}_{\mathrm{m}}}=\frac{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2{C}_1^{*}+4r_n|S_{21}{|}^2{\mathrm{\Gamma }}_{\mathrm{on}}}{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|S_{21}{|}^2+|S_{11}{|}^2-|\mathrm{\Delta }{|}^2)-|S_{21}{|}^2(|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1)-4r_n)}\end{array}$

and the radius is given by:

(14.6.15) $\begin{array}{ll}\hfill & {\gamma }_{{\mathrm{S}}_{\mathrm{m}}}=\hfill \\ \hfill & \sqrt{\frac{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(1-|S_{22}{|}^2-|S_{21}{|}^2)+|S_{21}{|}^2[|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1)+4r_n|{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2]}{M|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|\mathrm{\Delta }{|}^2-|S_{21}{|}^2-|S_{11}{|}^2)+|S_{21}{|}^2(|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1)-4r_n)}+|C_{{\mathrm{S}}_{\mathrm{m}}}{|}^2}\hfill \end{array}$

We can determine the value of the minimum noise measure obtainable with a given device by considering the noise measure circle of zero radius. This means finding a value of M that makes γ _Sm in equation (14.6.15) equal to zero. This can be done by trial and error, although closed form solutions have also been proposed [27, 28].

The source reflection coefficient which gives rise to $M_{min}$ is the center of the $M_{min}$ noise measure circle. Once the value of $M_{min}$ has been determined, the value of Γ_om can therefore be determined from equation (14.6.14) as:

(14.6.16) $\begin{array}{l}\hfill {\mathrm{\Gamma }}_{\mathrm{om}}=\frac{M_{min}|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2{C}_1^{*}+4r_n|S_{21}{|}^2{\mathrm{\Gamma }}_{\mathrm{on}}}{M_{min}|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(|S_{21}{|}^2+|S_{11}{|}^2-|\mathrm{\Delta }{|}^2)-|S_{21}{|}^2(|1+{\mathrm{\Gamma }}_{\mathrm{on}}{|}^2(F_{min}-1)-4r_n)}\end{array}$

With the input port of the transistor terminated in Γ_om, we can calculate the output reflection coefficient looking into the output port of the transistor by employing equation (6.2.7), that is,

(14.6.17) $\begin{array}{l}\hfill {\mathrm{\Gamma }}_{\mathrm{out}}=S_{22}+\frac{S_{12}{S}_{21}{\mathrm{\Gamma }}_{\mathrm{om}}}{1-S_{11}{\mathrm{\Gamma }}_{\mathrm{om}}}\end{array}$

The use of these equations is best illustrated by means of an example.

Example 14.4 (Minimum noise measure design)

Problem. Design a single-stage amplifier for minimum noise measure using an NE71083 GaAs MESFET at a center frequency of 10   GHz and bias conditions V _ds = 3.0 V, l _d = 8 mA. The S-parameters of the transistor in the common source configuration were measured, with a 50 Ω reference impedance, to be as follows:

(14.6.18) $\begin{array}{l}\hfill \left[\begin{array}{cc}\hfill S_{11}\hfill & \hfill S_{12}\hfill \\ \hfill S_{21}\hfill & \hfill S_{22}\hfill \\ \hfill \hfill \end{array}\right]=\left[\begin{array}{cc}\hfill 0.724\angle 46^{°}\hfill & \hfill 0.716\angle -47^{°}\hfill \\ \hfill 1.303\angle -10^{°}\hfill & \hfill 0.616\angle 64^{°}\hfill \\ \hfill \hfill \end{array}\right]\end{array}$

The following noise parameters were supplied by the manufacturer of the FET:

$\begin{array}{ll}\hfill F_{min}& =1.7\text{dB}\hfill \\ \hfill {\mathrm{\Gamma }}_{\mathrm{on}}& =0.620\angle 148^{°}\hfill \\ \hfill R_{\mathrm{n}}& =12\mathrm{\Omega }\hfill \end{array}$

Solution. The stability of the device is first evaluated using the Edwards-Sinsky stability criteria [29] of equations (7.4.36) and (7.4.37), that is,

(14.6.19) $\begin{array}{ll}\hfill {\mu }_1& =\frac{1-|S_{11}{|}^2}{|S_{22}-\mathrm{\Delta }{S}_{11}^{*}|+|S_{12}{S}_{21}|}=\frac{0.4758}{1.3283}=0.358\hfill \end{array}$

(14.6.20) $\begin{array}{ll}\hfill {\mu }_2& =\frac{1-|S_{22}{|}^2}{|S_{11}-\mathrm{\Delta }{S}_{22}^{*}|+|S_{12}{S}_{21}|}=\frac{0.6205}{1.1031}=0.563\hfill \end{array}$

Since both μ ₁ and μ ₂ are less than unity we conclude that the device is potentially unstable. We therefore need to draw a source plane stability circle to determine which source terminations we can use. We calculate the center and radius of the source plane stability circle using equations (7.4.14) and (7.4.15) as follows:

$\begin{array}{ll}\hfill C_{\mathrm{SS}}& =\frac{C_1^{*}}{|S_{11}{|}^2-|\mathrm{\Delta }{|}^2}=\frac{0.1702\angle 85^{°}}{-1.3559}=0.126\angle -94^{°}\hfill \\ \hfill r_{\mathrm{SS}}& =\frac{|S_{12}{S}_{21}|}{\left||S_{11}{|}^2-|\mathrm{\Delta }{|}^2\right|}=\frac{0.9329}{1.3559}=0.688\hfill \end{array}$

where $C_1=S_{11}-\mathrm{\Delta }{S}_{22}^{*}=0.1702\angle -85^{°}$ .

By determining the constant noise measure circle of zero radius the minimum noise measure obtainable with this device was found to be $M_{min}=0.435$ . equation (14.6.16) yielded the value of the associated source reflection coefficient, Γ_om, to be $0.729\angle 146.7^{°}$ .Figure 14.12 shows the source plane stability circle together with Γ_om and circles of constant noise measure on the source reflection coefficient plane, for various values on M, the latter being calculated using equations (14.6.14) and (14.6.15). Since the stability circle encompasses the origin the stable region is represented by the interior of the stability circle.

Figure 14.12. Source plane constant noise measure circles for NE71083 at 10   GHz (V _ds = 3.0 V, l _d = 8 mA).

Figure 14.12 shows that Γ_om lies outside the stable region in the source reflection coefficient plane. It is therefore not possible to realize a stable amplifier stage having the theoretical minimum noise measure of $M_{min}=0.435$ . In order to determine the lowest value of M consistent with a stable amplifier design, we draw progressively smaller circles of constant M until we reach the edge of the source plane stability circle. From Figure 14.12 we can see that the M = 0.5 circle just overlaps the source plane stability circle, allowing a small range of Γ_S values that will result in a stable amplifier with a value of M ≤ 0.5. We therefore choose a source termination ${\mathrm{\Gamma }}_{\mathrm{S}}=0.610\angle 148$ , which lies approximately in the center of this overlapping region, as shown in Figure 14.12. We can confirm that the corresponding load termination also lies within the load plane stable region by calculating the output reflection coefficient, Γ_out, of the transistor with an input termination ${\mathrm{\Gamma }}_{\mathrm{S}}=0.610\angle 148^{°}$ as follows:

$\begin{array}{ll}\hfill {\mathrm{\Gamma }}_{\mathrm{out}}& =S_{22}+\frac{S_{12}{S}_{21}{\mathrm{\Gamma }}_{\mathrm{S}}}{1-S_{11}{\mathrm{\Gamma }}_{\mathrm{S}}}\hfill \\ \hfill & =0.616\angle 64^{°}+\frac{0.716\angle -47^{°}\times 1.303\angle -10^{°}\times 0.610\angle 148^{°}}{1-0.724\angle 46^{°}\times 0.610\angle 148^{°}}\hfill \\ \hfill & =0.616\angle 64^{°}+\frac{0.569\angle 91^{°}}{1.433\angle 4^{°}}\hfill \\ \hfill & =0.994\angle 73^{°}\hfill \end{array}$

The load required to conjugately match the output port of the device is therefore ${\mathrm{\Gamma }}_{\mathrm{L}}={\mathrm{\Gamma }}_{\mathrm{out}}^{*}=0.994\angle -73^{°}$ . The fact that |Γ_out| is close to unity is a reflection of the fact that the chosen value of Γ_S is close to the boundary of the source plane stable region.

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Semiconductor diodes and transistors

Martin Plonus , in Electronics and Communications for Scientists and Engineers (Second Edition), 2020

4.7 Summary

•

This chapter lays the foundation for more complicated electronics such as multistage amplifiers, operational amplifiers, integrated circuits, oscillators, and digital and analog electronics.

•

We showed that conduction can be by electrons and by holes and that doping of a semiconductor can increase its conductivity substantially. In a p-type doped semiconductor, holes are majority carriers and electrons are minority carriers.

•

The pn-junction was shown to be practically an ideal diode which under forward bias acted as a switch in the on-position and under reverse bias as a switch in the off-position. The rectifier equation showed this behavior mathematically.

•

A bipolar junction transistor (BJT) was formed by two diodes back-to-back with the input junction forward-biased and the output junction reverse-biased. Amplification is possible as the current that flows through the low-resistance input junction (emitter-base) is forced to flow also through the high-resistance output (base-collector) junction. The BJT is basically a current amplifier.

•

A second type of a transistor, simpler in concept, is the field effect transistor (FET). An input voltage varies the width of a channel in a doped semiconductor through which a current flows, thus controlling the output current. Since the input impedance of a FET is very high, practically no input current flows and the FET can be considered as a voltage amplifier.

•

Amplifier action was shown graphically by first deriving the equation of a load line and plotting it on the output characteristics of the transistor. After choosing the Q-point on the load line and designing the DC biasing circuit to establish that Q-point, the amplifier gain was calculated by assuming an input voltage (or current) variation and using the load line to read off the corresponding output voltage (or current) variation.

•

An amplifier, in addition to voltage and current gain, can also provide power gain. In that sense it is fundamentally different from a device such as a transformer which can also provide voltage or current gain but never power gain. The energy of the amplified signal, which can be much larger than that of the input signal, has its source in the battery or the DC power supply. Since only the input signal should control the output, the voltage from the power supply must be constant so as not to influence the variations of the output signal, if the output is to be a faithful but magnified replica of the input signal. As electric utilities provide AC power only, rectifiers and filters studied in previous chapters are part of a key component of electronic equipment, namely, the DC power supply.

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Practical transmission lines

Clive Poole , Izzat Darwazeh , in Microwave Active Circuit Analysis and Design, 2016

3.6.2 Microstrip Gaps and DC Blocks

It is often necessary to provide a DC break in a microstrip line, while allowing the RF signal to pass through with the minimum amount of attenuation. Such DC blocks are typically required between the various stages of a multi-stage amplifier, in order to isolate the DC bias levels of one stage from the next. The DC blocking function is often carried out using a chip capacitor connected across a gap in the microstrip line. It is possible, however, to use the gap itself as a DC block, which eliminates the need for an additional component.

A representation of a microstrip gap between two microstrip lines of different widths is shown in Figure 3.9 (a). This gap may be approximately modeled by the equivalent π-network of Figure 3.9 (b).

Figure 3.9. Microstrip discontinuity and its electrical equivalent circuit.

The capacitor values of the equivalent π-network in Figure 3.9 (b), in "pF," are given by Kirschning [26]:

(3.6.3) $\begin{array}{ll}\hfill C_{\mathrm{S}}& =500\cdot h\cdot exp\left(-1.86\cdot \frac{s}{h}\right)Q_1\left[1+4.19\left(1-exp\left[-0.785\cdot \sqrt{\frac{h}{W_1}}\cdot \frac{W_2}{W_1}\right]\right)\right]\hfill \end{array}$

(3.6.4) $\begin{array}{ll}\hfill C_{\mathrm{P}1}& =C_1\cdot \frac{Q_2+Q_3}{Q_2+1}\hfill \end{array}$

(3.6.5) $\begin{array}{ll}\hfill C_{\mathrm{P}2}& =C_2\cdot \frac{Q_2+Q_4}{Q_2+1}\hfill \end{array}$

where s is the width of the gap, h is the height of the substrate, and W ₁ and W ₂ are the line widths indicated in Figure 3.9 (a).C ₁ and C ₂ are the open end capacitances of the respective microstrip lines in Figure 3.9 (a) according to either equation (3.6.1) or (3.6.2), depending on the degree of accuracy required. The coefficients Q _n are defined by Kirschning as follows:

(3.6.6) $\begin{array}{ll}\hfill Q_1& =0.04598\cdot \left(0.03+{\left(\frac{W_1}{h}\right)}^{Q_5}\right)\cdot (0.272+0.07\cdot {\epsilon }_{\mathrm{r}})\hfill \end{array}$

(3.6.7) $\begin{array}{ll}\hfill Q_2& =0.107\cdot \left(\frac{W_1}{h}+9\right)\cdot {\left(\frac{s}{h}\right)}^{3.23}+2.09{\left(\frac{s}{h}\right)}^{1.05}\cdot \frac{1.5+0.3\cdot W_1/h}{1+0.6\cdot W_1/h}\hfill \end{array}$

(3.6.8) $\begin{array}{ll}\hfill Q_3& =exp\left(-0.5978\cdot {\left(\frac{W_2}{W_1}\right)}^{1.35}\right)-0.55\hfill \end{array}$

(3.6.9) $\begin{array}{ll}\hfill Q_4& =exp\left(-0.5978\cdot {\left(\frac{W_1}{W_2}\right)}^{1.35}\right)-0.55\hfill \end{array}$

The numerical error of the capacitive admittances is less than 0.1   mS provided that the following conditions are met:

$\begin{array}{ll}\hfill & 0.1\le W_1/h\le 3\hfill \\ \hfill & 0.1\le W_2/h\le 3\hfill \\ \hfill & 1\le W_2/W_1\le 3\hfill \\ \hfill & 6\le {\epsilon }_{\mathrm{r}}\le 13\hfill \\ \hfill & 0.2\le s/h\le \infty \hfill \\ \hfill & 0.2\text{GHz}\le f\le 18\text{GHz}\hfill \end{array}$

Once the capacitor values in the equivalent circuit of Figure 3.9 (b) have been calculated using the above formulas, the Y-parameters for the two-port equivalent circuit can be calculated as follows:

(3.6.10) $\begin{array}{l}\hfill Y=\left[\begin{array}{cc}\hfill j\omega (C_{\mathrm{P}1}+C_{\mathrm{S}})\hfill & \hfill -j\omega C_{\mathrm{S}}\hfill \\ \hfill -j\omega C_{\mathrm{S}}\hfill & \hfill j\omega (C_{\mathrm{P}2}+C_{\mathrm{S}})\hfill \end{array}\right]\end{array}$

These Y-parameters can be converted to S-parameters using the relationships in Appendix A. This rather long-winded process allows us to treat the DC block as a two-port network for the purpose of further analysis. Needless to say, most of the above calculations will nowadays be carried out within a CAD environment, but they are presented here to give an insight into the complexity of modeling even quite simple discontinuities in microstrip.

Interested readers are referred to a useful paper on DC blocks by LaCombe and Cohen [27], which contains design information based mainly on experimental results. Synthesis equations for microstrip DC blocks are given in another paper by Kajfez [28]. Another useful reference on this topic is the short paper by Borgaonkar and Rao [29].

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Microwave amplifier design

Clive Poole , Izzat Darwazeh , in Microwave Active Circuit Analysis and Design, 2016

13.4 Multistage amplifiers

The gain of the single-stage amplifiers so far discussed is ultimately limited by the parameters of the transistor used. The conventional approach to increasing the gain above that of a single-stage is to cascade multiple stages. In order to achieve maximum power transfer between the stages, interstage matching networks are required, as shown in Figure 13.7, that uses a BJT for illustration.

Figure 13.7. Conceptual multistage amplifier.

Ideally, with perfect lossless matching networks, the gain of a multistage amplifier is the product of the gains of each stage. The overall numeric gain of the amplifier in Figure 13.7 is, therefore,

(13.4.1) $\begin{array}{l}\hfill G_{\mathrm{tot}}=G_{Q_1}\cdot G_{Q_2}\cdot G_{Q_3}\end{array}$

If the gains are expressed in dB then equation (13.4.1) can be written as:

(13.4.2) $\begin{array}{l}\hfill G_{tot(dB)}=G_{Q_1(\mathrm{dB})}+G_{Q_2(\mathrm{dB})}+G_{Q_3(\mathrm{dB})}\end{array}$

In Chapter 7, we showed that the power gain of an amplifier is a function of the source and load terminations. In the context of Figure 13.7, this means that the individual stage gains in equations (13.4.1) and (13.4.2) will depend on the source and load terminations presented by the respective interstage matching networks (or input and output matching networks in the case of the first and last stages). Each transistor, Q _n , in Figure 13.7 sees a source and load termination Γ_{S n} and Γ_{L n} , the values of which are determined by the respective matching network. Simplistically, we could maximize the gain of each stage by setting:

(13.4.3) $\begin{array}{l}\hfill {\mathrm{\Gamma }}_{{\mathrm{S}}_n}={\mathrm{\Gamma }}_{{\mathrm{ms}}_n}\end{array}$

and

(13.4.4) $\begin{array}{l}\hfill {\mathrm{\Gamma }}_{{\mathrm{L}}_n}={\mathrm{\Gamma }}_{{\mathrm{ml}}_n}\end{array}$

where Γ_{ms n} and Γ_{ml n} are the optimum terminations for that particular transistor, defined by equations (7.5.24) and (7.5.25). This assumes, of course, that the device in question is unconditionally stable, as defined in Section 7.4.3.

The design of the interstage matching networks is therefore critically important to the performance of the overall amplifier and, consequently, a large body of work exists on this subject. In addition to fulfilling the gain specification, the design of the interstage matching circuitry must take into account several other requirements, such as:

•

Impedance matching: As a general rule we seek to achieve maximum power transfer between each stage of a multistage amplifier. Exceptions to this rule are when we need to achieve minimum noise figure (as explained in Chapter 14) or when doing so would lead to instability of the overall amplifier.

•

DC isolation: It is often the case that the output port of one stage is at a different DC potential to the input of the next, due to different bias requirements at base and collector (or gate and drain) terminals of a transistor. Each stage will therefore need to have DC isolation from the preceding and following stages. This is usually accomplished by means of a DC blocking capacitor. Depending on the capacitor value, its reactance may have to be incorporated in the AC analysis.

•

Frequency response: Attempting to satisfy the above two requirements will inevitably impact on a third-important consideration, namely the frequency response of the overall amplifier. We often seek the maximum gain over the widest possible bandwidth and one approach is to eliminate any interstage coupling capacitors, which we would otherwise use for DC blocking. Such "direct coupled" amplifiers are more challenging to design.

A key figure of merit which is particularly important for multistage amplifiers is the Gain-Bandwidth Product or "GBP," which is defined as the product of the amplifier's 3   dB bandwidth and the nominal gain (i.e., the gain at the center of the passband). Since gain is a dimensionless ratio (not dB), the GBP is expressed in units of Hz. For the purposes of this analysis, we shall assume that the amplifier has a first-order frequency response, described by:

(13.4.5) $\begin{array}{l}\hfill A(\omega )=\frac{A_{\mathrm{o}}}{\sqrt{1+{\left(\frac{\omega }{{\omega }_{\mathrm{c}}}\right)}^2}}\end{array}$

where A _o is the nominal or "passband" gain of the amplifier and ω _c is the corner frequency of the first-order response, that is, the 3   dB frequency. We can show that the GBP is approximately constant, in other words gain and bandwidth can be "traded-off" against each other. The proof of constant GBP for an amplifier is as follows, starting with the definition of GBP at a frequency, ω:

(13.4.6) $\begin{array}{ll}\hfill \text{GBP}& =A(\omega )\cdot \omega \hfill \end{array}$

(13.4.7) $\begin{array}{ll}\hfill & =\frac{A_{\mathrm{o}}}{\sqrt{1+{\left(\frac{\omega }{{\omega }_{\mathrm{c}}}\right)}^2}}\cdot \omega \approx \frac{A_{\mathrm{o}}}{\sqrt{{\left(\frac{\omega }{{\omega }_{\mathrm{c}}}\right)}^2}}\cdot \omega \hfill \end{array}$

(13.4.8) $\begin{array}{ll}\hfill & =A_{\mathrm{o}}\cdot {\omega }_{\mathrm{c}}\hfill \end{array}$

Since both A _o and ω _c are constants, it follows that A _o ⋅ ω _c must be a constant. For transistors, the current GBP is the same as the transition frequency, f _T, that was defined for BJTs and field-effect transistors (FETs) in equations (12.2.12) and (12.5.14), respectively. Transistors are usually operated at frequencies well below their f _T in order to obtain useful power gain. In bipolar transistors, f _T varies with collector current, I _c, reaching a maximum at a particular value of I _c.

So, when designing multistage amplifiers, we encounter the problem of bandwidth shrinkage. This is due to the fact that the gain versus frequency transfer functions are multiplied, increasing the overall gain but also increasing the steepness of the gain roll-off. In simple terms, when two identical amplifier stages, each having a 20   dB per decade roll-off characteristic, are cascaded the resultant cascade will have a 40   dB per decade roll-off characteristic. The −3   dB bandwidth of the cascade will therefore be less than that of the individual stages. We therefore need to be aware that, as we increase the gain by adding more stages, we will inevitably be sacrificing bandwidth.

Consider a multistage amplifier, such as that shown in Figure 13.7, generalized to n identical stages, each having a voltage gain A and a 3   dB bandwidth B.

Let us again assume a "first-order" frequency dependence for the individual stages, so that the frequency dependence of amplifier gain magnitude for each stage is represented by:

(13.4.9) $\begin{array}{l}\hfill A(f)=\frac{A_{\mathrm{o}}}{\sqrt{1+{\left(\frac{f}{B}\right)}^2}}\end{array}$

For the overall amplifier consisting of n such stages in cascade we have, from an extension of equation (13.4.1) to n stages:

(13.4.10) $\begin{array}{l}\hfill A_{\mathrm{t}}(f)={\left[\frac{A_{\mathrm{o}}}{\sqrt{1+{\left(\frac{f}{B}\right)}^2}}\right]}^n\end{array}$

With an amplifier having a first-order response, the overall 3   dB bandwidth of the amplifier is the frequency at which the voltage gain falls to $1/\sqrt{2}$ of its nominal value, A _t, that is, where $A_{\mathrm{t}}(f)=A_{\mathrm{t}}/\sqrt{2}$ . At this frequency, which we will call B _t , and based on equation (13.4.10) we can write:

(13.4.11) $\begin{array}{l}\hfill \frac{A_{\mathrm{t}}}{\sqrt{2}}={\left[\frac{A_{\mathrm{o}}}{\sqrt{1+{\left(\frac{B_{\mathrm{t}}}{B}\right)}^2}}\right]}^n\end{array}$

Given that A _t = A _o ⁿ , we can derive the bandwidth of the overall amplifier in terms of the individual stage bandwidths from equation (13.4.11) as:

(13.4.12) $\begin{array}{l}\hfill B_{\mathrm{t}}=B\sqrt{2^{1/n}-1}\end{array}$

A cascade of n identical amplifier stages will therefore have a bandwidth less than that of an individual stage by a factor of $\sqrt{2^{1/n}-1}$ . The GBP for each individual stage can thus be written as:

(13.4.13) $\begin{array}{l}\hfill {\text{GBP}}_{\mathrm{S}}=A_{\mathrm{o}}\times B=\left(\frac{B_{\mathrm{t}}}{\sqrt{2^{1/n}-1}}\right)\cdot {\left(A_{\mathrm{t}}\right)}^{1/n}\end{array}$

An interesting question arising from equation (13.4.13) is, what is the optimum number of stages which will be required to achieve the maximum overall GBP specification for a cascade of identical amplifier stages? Jindal [7] answered this question by differentiating equation (13.4.13) with respect to n and obtaining the optimum number of stages, n _opt, as a function of the overall gain, A _t, as follows:

(13.4.14) $\begin{array}{l}\hfill n_{\mathrm{opt}}=\frac{ln(2)}{\left[-\frac{ln\left(2\right)}{2ln\left(A_{\text{t}}\right)}\right]}\end{array}$

If $A_{\mathrm{t}}\gg \sqrt{2}$ we can approximate equation (13.4.14) to:

(13.4.15) $\begin{array}{l}\hfill n_{\mathrm{opt}}=2ln(A_{\mathrm{t}})\end{array}$

Jindal [7] gives the example of a multistage amplifier having a gain A _t = 100, for which equation (13.4.15) gives n _opt = 9.2. If we required the overall amplifier to have a bandwidth of 880   MHz, we find that the optimum value for the GBP for each individual stage, from equation (13.4.13) is 5.2   GHz.

Example 13.3 Multistage amplifier design

Problem. You are required to design a broadband multistage amplifier comprising a number of identical stages and having a total GBP of 20  GHz. The overall amplifier gain should be 30   dB. Determine the number of stages required, and the necessary gain and bandwidth of the individual stages.

Solution. First, we need to convert 30   dB into a numerical voltage gain:

$\begin{array}{ll}\hfill 30& =20{log}_{10}(A_{\mathrm{t}})\hfill \\ \hfill A_{\mathrm{t}}& =10^{(30/20)}=31.63\hfill \end{array}$

The optimum number of stages is then given by equation (13.4.15):

(13.4.16) $\begin{array}{l}\hfill n_{\mathrm{opt}}=2ln(31.63)\approx 7\end{array}$

Using equation (13.4.13) we calculate the GBP of each stage as:

$\begin{array}{ll}\hfill {\text{GBP}}_{\mathrm{S}}& =\left(\frac{20}{\sqrt{2^{1/7}-1}}\right)\cdot {\left(31.63\right)}^{1/7}\hfill \\ \hfill & \approx 102\text{GHz}\hfill \end{array}$

Given that the gain of each stage is 31.63^1/7 = 1.638 (i.e., 4.3   dB), we can calculate the required bandwidth of each stage as:

(13.4.17) $\begin{array}{l}\hfill {\text{BW}}_{\mathrm{S}}=\frac{102}{1.638}\approx 62\text{GHz}\end{array}$

13.4.1 Fundamental Limits on the Bandwidth of Interstage Matching Networks

All matching networks are essentially filter structures, and interstage matching network design is closely related to passive filter design, which we have not covered in this book but is very well covered elsewhere [8,9]. When we consider the design of broadband interstage matching networks, it is worth considering whether there are any fundamental limits on the achievable match and what they might be. Theoretical limits of bandwidth that can be achieved when matching an arbitrary source to different types of load were first proposed by Bode and Fano in the 1930s, who found that the integral of return loss is bound by a constant [10,11]. The so-called Bode-Fano Criteria set a theoretical limit on the minimum reflection magnitude, in other words the degree of matching, for a lossless matching network terminated in an arbitrary load [8]. The criterion provides the theoretical upper limit of performance that can be obtained. This gives us a benchmark and allows us to trade off between reflection coefficient, bandwidth, and network complexity.

The Bode-Fano criteria for simple RC and RL loads matched with a passive, lossless matching network are shown in Figure 13.8.

Figure 13.8. Bode-Fano criteria for four types of simple load impedance. (a) Matching parallel RC loads. (b) Matching series RC loads. (c) Matching parallel LR loads. (d) Matching series LR loads.

If it were possible to build a matching network having the perfectly rectangular reflection coefficient response of Figure 13.9 (a), the Bode-Fano limits for the four simple load circuits shown in Figure 13.8 would be:

Figure 13.9. Bode-Fano matching illustration. (a) Idealized matching network response. (b) Nonrealizable matching network response. (c) Realizable matching network response.

(13.4.18) $\begin{array}{ll}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}& \le \frac{\pi }{R({\omega }_{\mathrm{o}}C)}\hfill \end{array}$

(13.4.19) $\begin{array}{ll}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}& \le \frac{\pi ({\omega }_{\mathrm{o}}L)}{R}\hfill \end{array}$

(13.4.20) $\begin{array}{ll}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}& \le \frac{\pi R}{({\omega }_{\mathrm{o}}L)}\hfill \end{array}$

(13.4.21) $\begin{array}{ll}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}& \le \pi R({\omega }_{\mathrm{o}}C)\hfill \end{array}$

where Δω is the width of the passband, Γ_avg is the average absolute value of the reflection coefficient looking into the matching network in the passband, and ω _o is the center frequency of the passband. The quantity Δω/ω _o is the fractional bandwidth of the matching network. The way to interpret equation (13.4.18), for example, is that the area under the $ln(1/\mathrm{\Gamma })$ can never exceed π/RC. Any increases in the bandwidth of the matching network can therefore only be achieved at the expense of less power transfer, in other words a poorer quality of match in the passband.

The Bode-Fano limits can be written in terms of reactance/susceptance for a generalized load impedance/admittance, respectively, as follows:

(13.4.22) $\begin{array}{ll}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}& \le \frac{\pi G}{B}\hfill \end{array}$

(13.4.23) $\begin{array}{ll}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}& \le \frac{\pi R}{X}\hfill \end{array}$

where G is the load conductance, B is the load susceptance, R is the load resistance, and X is the load reactance.

The load that was initially considered by Bode was the simple parallel RC circuit shown in Figure 13.8 (a). In this case, the match performance limit can be described in terms of load-Q, as follows:

(13.4.24) $\begin{array}{l}\hfill \frac{\mathrm{\Delta }\omega }{{\omega }_{\mathrm{o}}}\frac{1}{{\mathrm{\Gamma }}_{\mathrm{avg}}}\le \frac{\pi }{Q}\end{array}$

It turns out that equation (13.4.24) applies equally to the other prototype loads in Figure 13.8. equation (13.4.24) suggests that the more reactive energy that is stored in a load, the narrower the bandwidth of a match. The higher the Q is, the narrower the bandwidth of the match for the same average in-band reflection coefficient. Accordingly, it will be much harder to design the matching network to achieve a specified matching bandwidth. Only when the load is purely resistive can a match over all frequencies be found.

The ideal situation is to maintain 1/Γ constant over the frequency range of interest, Δω, and have it equal to one outside this range, as shown in Figure 13.9 (a). A matching profile like that of Figure 13.9 (a) is unrealizable as it would require an infinite number of elements in the matching network [8]. Even a more realistic response like that shown in Figure 13.9 (b) is unrealizable as it is not possible in practice to achieve a perfectly flat passband response. Any realizable matching network will have a response resembling the one shown in Figure 13.9 (c), where neither the passband or stopband response are "ideal."

The implications of the Bode-Fano criterion are as follows:

1.

For a given load (e.g., a fixed RC product) broader bandwidth (Δω) can be achieved only at the expense of higher reflection coefficient in the passband.

2.

The reflection coefficient in the passband cannot be zero unless Δω = 0. Thus a perfect match can be achieved only at a spot frequency.

3.

As R and/or C increases, the quality of the match (Δω and/or 1/Γ_m) must decrease. Thus higher-Q circuits are intrinsically harder to match than are lower-Q circuits.

The results obtained above for the simple high-pass/low-pass prototype loads in Figure 13.8 can be extended to the two-element bandpass cases by well-known lowpass to bandpass transformations [8].

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Microwave Communications

U.S. Berger , in Encyclopedia of Physical Science and Technology (Third Edition), 2003

VII.K IMPATT Amplifiers

Impact avalanche transit time (IMPATT) solid-state power amplifiers also use the negative resistance of the diode in specially designed circuits that include circulators and strip line to connect the devices together. Both silicon and gallium arsenide materials have been used, depending upon the power level at which the amplifiers are to operate. In relatively low-power amplifiers (1–2   W), a single diode can provide the required output, but for higher powered applications, several devices must be cascaded.

IMPATT amplifiers are basically reflection amplifiers. The input signal from one port of a circulator is terminated with an IMPATT diode that is suitably biased into the negative-resistance region. Amplification takes place because negative resistance has been introduced into the circuit which cancels out the losses so that the output signal is higher than the input. The output is returned to the same port, circulated to an adjacent port, and then delivered to the system output in the case of a single-diode unit or to the next stage of a multistage amplifier. The output cannot be conducted toward the input because of the high reverse loss of the circulator.

In the case of single-diode amplifiers, approximately 20   dB of gain can be realized at frequencies in the 6-to 11-GHz range. Tuning procedures, while not complicated, frequently require caution by the operator to avoid improper matching of the diode into the circuit. If this should happen, there is a possibility that the diode will be permanently damaged. Electron tubes are much more tolerant of misadjustment than IMPATT diodes. Noise figures of IMPATT amplifiers are generally high; some typical power amplifier noise figures range from 30 to 50   dB, which is higher than those for electron devices.

In multistage amplifiers, each diode must be individually biased and it is necessary to carefully regulate the voltage to each semiconductor. The IMPATT amplifier can be highly nonlinear, and therefore it is not well suited for AM systems. These nonlinearities do not degrade the performance of angle-modulated systems using either FM or PM. In some applications requiring high gain, the IMPATT diode may function as a locked oscillator, where the input signal causes the oscillator to instantaneously follow the input frequency exactly. This is the equivalent of an amplifier, for the output signal is a replica of the input but the amplitude is the equivalent of that of the oscillator. Precautions must be taken to assure that in case of failure of the input source the amplifier is adequately squelched to prevent interference.

The IMPATT amplifier has been successfully used in 6- and 11-GHz systems operating in the 1- to 3.5-W power range with quite satisfactory results. These have been single-diode units of both silicon and gallium arsenide. As the output power level requirements rise, the maintenance difficulties, circuit complications, and costs accelerate rapidly. A five-stage amplifier requires five voltage regulators, output monitors on each of the five stages, an intricate strip-line circulator structure, and meticulous circuit adjustment. The power efficiency, that is, the rf output power versus the overall dc input power, is considerably lower for the IMPATT amplifier compared to the TWT. In large installations where many amplifiers are used, these power differences may be significant.

The component costs of the 10-W IMPATT amplifier, which can provide the same gain as a TWT (about 32   dB), are not substantially lower than the TWT and the high-voltage power supply that it was to replace, and while it has been demonstrated that solid-state 10-W amplifiers are feasible, they are not used in long-haul terrestrial common-carrier systems today.

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Fibre optic communications

Takis Hadjifotiou , John McFarlane , in Telecommunications Engineer's Reference Book, 1993

53.4.2 Analogue optical receivers

The SNR of an analogue receiver can be interpreted as either the SNR directly applicable to the information being received or as the carrier to noise ratio (CNR) which should then be used as the input SNR to the demodulator suitable for the modulation scheme employed. For example in a FM subcarrier modulation scheme the FM SNR can be obtain from the CNR by standard FM detection analysis. The SNR or the CNR is given by Equation 53.63 in which m is the modulation index, < i_na ² > is the amplifier mean square noise and Δ f is the receiver bandwidth.

(53.63) $SNR=\frac{1}{2}\frac{{\left(mRM<P_{opt}>\right)}^2}{\left[2e\left(I_{dm}+R<P_{opt}>\right)M^{2}F+2e{I}_{um}\right]\Delta f+<i_{na}^2>}$

The meaning of the other parameters can be found in the section on detectors. The details of the < i_na ² > depend on the representation of the amplifier noise. For optical receivers the best approach is to represent the amplifier, being a single device or a multistage amplifier, by two independent noise sources with white spectral density, a current source i _n, and a voltage source e_n. The detailed equations for these noise sources depends on the class of active devices used. For a FET amplifier they are given by Equations 53.64 and 53.65.

(53.64) $\frac{d<i_n^2{>}_{fet}}{df}=2e{I}_{gate}$

(53.65) $\frac{d<e_n^2>}{df}=\frac{4kT\Gamma }{g_m}$

Γ is a numerical constant with a typical value of 0.7 for silicon FETs, 1.75 for GaAs MESFETs and 1.0 for short channel silicon MOSFETs. Then the noise spectral density referred to the input of the receiver is given by Equation 53.66 where R is either the load of the detector for high impedance input or the feedback resistor of a transimpedance amplifier.

(53.66) $\begin{array}{l}\frac{d<n^2\left(f\right){>}_{fet}}{df}=\frac{4kT}{R}\\ +2e{I}_{gate}+\frac{4kT\Gamma }{g_m}{\left(2\text{π}{C}_t\right)}^2{f}^2\end{array}$

C_t is the total input capacitance, which consists of the detector and input parasitic capacitance, the gate-source and gate-drain FET capacitances and the parasitic capacitance of the load resistor R. The value of < e_na ² > is obtained by integrating Equation 53.66 over the bandwidth of the receiver. For a bipolar transistor amplifier the noise spectral density is given by Equation 53.67.

(53.67) $\begin{array}{l}\frac{d<n^2\left(f\right){>}_{bip}}{df}=\frac{4kT}{R}+2e{I}_b+\frac{2e{I}_c}{g_m}{\left(e\text{π}{C}_t\right)}^2{f}^2\\ +4kT{r}_{bb}{\left(2\text{π}{C}_{sf}\right)}^2{f}^2\end{array}$

The capacitances C_T and C_df are given by Equations 53.68 and 53.69, where C_d is the parasitic detector capacitance and C_π and C_μ are the hybrid-π model capacitances.

(53.68) $C_T=C_{df}+C_{\text{π}}+C_{\text{μ}}+C_f$

(53.69) $C_{df}=C_{df}+C_f$

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Bandpass ΔΣ ADCs for Wireless Receivers

Richard Schreier , Hajime Shibata , in Advances in Analog and RF IC Design for Wireless Communication Systems, 2013

8.2.3 Amplifier

Two op amp designs are used in the loop filter: a 2.5   V/1   V dual-supply design is used in A1 and A2 and a 1   V single-supply design is used in A3–A6. Both designs are multi-stage multi-path feed-forward op amps [14–18].

The basic concept of a multi-stage multi-path feed-forward op amp is to combine the high bandwidth of a single-stage amplifier with the high gain of a multi-stage amplifier by summing their outputs. Figure 8.15a shows a basic third-order feed-forward op amp. The first-order path in this amplifier consists of a single stage (g _m1) while the third-order path consists of three stages (g _m3A, g _m3B, and g _m3C). A second-order path (g _m2A and g _m2B) provides a controlled transition from third- to first-order behavior. The overall gain of the amplifier is the envelope of the path gains as shown in Figure 8.15b because the path with the highest gain dominates the response of the amplifier at any given frequencies.

Figure 8.15. Conceptual diagrams of a multi-path multi-stage feed-forward op amp.

To make the amplifier stable in a feedback loop, the gain must be gradually reduced from a high-order response to a first-order response around the unity gain frequency so that the phase response approaches 90° as shown in Figure 8.15b. Inter-stage capacitors which control the bandwidths of the second- and higher-order paths ensure that the amplifier is closed-loop stable.

Since a multi-stage feed-forward op amp is a conditionally stable system, the amplifiers could become unstable if the signal swing is large enough to cause the effective gain of the internal stages to be reduced. This behavior is problematic if the amplifiers are used in an ordinary filter, but is less problematic in a ΔΣ ADC. The reason is that a ΔΣ ADC, which is also a conditionally stable system, also becomes unstable in such a large-state scenario and must be reset. Resetting the amplifiers whenever the ADC is reset is sufficient to solve the problem of conditional stability in the amplifiers.

The amplifiers in a ΔΣ ADC must satisfy two gain requirements, one in the vicinity of the signal band and one in the vicinity of F _S/2. In the signal band, the amplifier gain must be high enough to meet the distortion targets and to ensure sufficient coefficient accuracy. A typical requirement is 40–50   dB of loop gain at the signal frequency for feedback-style ΔΣ ADCs or as low as 20   dB of loop gain for feedforward-style ΔΣ ADCs. At F _S/2 a moderate loop gain of 10–20   dB is needed to process the injected current from the feedback DACs. In bandpass feedback-style ΔΣ systems, the first requirement is usually more stringent because the in-band frequency F ₀ is typically within a few octaves of F _S/2.

In this system, −80-dBc distortion and 1% coefficient variation require 50   dB of gain at 200   MHz for A1–2 and 40   dB of gain at 1   GHz for A3–6. These requirements translate into gain bandwidth (GBW) products of 63   GHz and 100   GHz. Since these GBW requirements are almost the same as the maximum f _T of the 65   nm CMOS devices used in this design, a traditional op amp design having a first-order roll-off would be unable to meet the GBW requirements. However, in a feed-forward op amp, the low-frequency gain and the unity-gain frequency are decoupled by the high-order roll-off. Since a GBW product of only 6   GHz or so is needed at F _S/2 and since the low-frequency GBW can be increased by adding higher-order paths, a feed-forward op amp is a good fit for the requirements of a high-speed feedback-style bandpass ΔΣ ADC.

A simple extension of the third-order design shown in Figure 8.15a into a fifth-order design yields the amplifier design shown in Figure 8.16a. This design is power-inefficient because five independent output stages consuming similar amounts of power are connected in parallel. To make the amplifier more power efficient, stage sharing and power scaling can be applied as illustrated in Figure 8.16b. In this circuit, four output stages are merged into g _m2, two output driver stages are combined into g _m6, and three input stages become g _m4. In a similar manner to scaling in CMOS inverter chains, power scaling allocates less power to stages that are far from the power-hungry output stage. In this design, the output stage consumes 38   mW whereas internal stages consume as little as 2   mW; 14   mW is allocated to the g _m4 input stage for noise reasons. The total power consumption of the A1 amplifier is 100   mW while the sum of the input and the output stage power consumption is 49   mW, which is essentially the minimum power consumption needed to achieve the required input-referred noise and load-driving capability. Therefore the power penalty associated with the gain requirements relative to the drive and noise requirements is a factor of two for this fifth-order amplifier.

Figure 8.16. Fifth-order multi-stage multi-path feed-forward op amps: (a) primitive fifth-order design, (b) A1 op amp design.

To minimize power consumption, the 2.5   V supply voltage is only used in the main output stage, g _m2, and the main input stage, g _m4. The output stage, g _m2, shown in Figure 8.17 is a 2.5   V design to maximize the output voltage swing. This stage consists of complementary 1   V NMOS/PMOS pseudo-differential pairs to maximize g _m and 2.5   V cascode devices (denoted with a thick gate) to protect the 1   V devices. The input stage, g _m4, shown in Figure 8.18 is a folded-and-telescopic g _m stage that has PMOS and NMOS differential pairs connected in parallel to maximize the g _m/I _bias ratio. The common-mode voltage is reduced from 1.25   V at the input to 0.7   V at the output to avoid over-voltage stress in the subsequent 1   V stages. Other internal stages employ differential pairs or pseudo-differential pairs using 1   V MOSFETs to maximize bandwidth and minimize power consumption.

Figure 8.17. Output stage of the A1 op amp.

Figure 8.18. Input stage of the A1 op amp.

In addition, the first-order and second-order bypassing stages, g _m1 and g _m3, are AC-coupled in order to interface these 1   V circuits to the 1.25   V I/O common-mode voltage. A reverse-connected high-pass filter at g _m1's output protects g _m1 from the large-voltage swing present at the amplifier output. Lastly, stages g _m8 and g _m9 produce a gain resonance at 300   MHz to enhance the high-frequency gain of the amplifier.

The design used for the A3–A6 amplifiers, which handle signal frequencies up to 1   GHz, is a pure 1   V supply seventh-order multi-stage feedforward amplifier employing a structure similar to that of the fifth-order design.

The loop gains of both designs are shown in Figure 8.19. The plot for A1 confirms that five g _m stages connected in series provides 60   dB of gain at 250   MHz for a 250   GHz effective GBW with a unity-gain frequency of 6   GHz. The A3 design achieves 40   dB at 1.5   GHz for a 150   GHz effective GBW, and a 15   GHz unity-gain frequency. The plots also illustrate the loop gain has a fifth- or seventh-order response in the low-frequency region and reverts back to a first-order response as the unity gain frequency is approached. The loops are conditionally stable having phase margins of 75° and 65°, respectively.

Figure 8.19. Simulated A1 and A3 op amp loop-gain.

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Heating, current drive and fuelling of magnetic fusion power plants

E. Surrey , in Magnetic Fusion Energy, 2016

17.3.2 Ion cyclotron systems

The requirements for IC systems relevant to power plants are compared to currently operating values in Table 17.2, together with the values for ITER and proposed facilities. Existing technology covers the heating frequency range of 25–100   MHz for power plants but there are gaps in the CD range of 100–350   MHz. Transmission lines can be used at the lower frequencies and waveguides at the higher end of the range. A ceramic feed-through isolates the transmission line from the vacuum vessel of the device.

There are several matching technologies: frequency modulation [41], dielectric liquid stubs [42,43] and ferrite tuners [44–46]. Recent results at Alcator C-Mod have demonstrated transmission efficiency from source output to plasma of 92% [47]. A typical layout is shown in Fig. 17.6.

Figure 17.6. (a) Layout of the ITER–ICRH system [40]. (b) Isometric view of ITER IC port plug showing antenna and supporting structure. The straps (copper coloured) and faraday shield face the plasma.

Several sources of RF radiation are available, tetrodes at lower frequency and klystrons at higher frequency being the most common – both are mature technologies. Similar requirements to the EC gyrotron apply, ie, the stability of the HV power supply, tolerances of the magnetic field and application of the depressed collector. Tetrodes are limited to around 300   kW CW output power but pulsed operation at frequencies up to 80   MHz has been demonstrated at >2   MW   at AUG [48] (the Diacrode is a higher-power, double-ended tetrode) with lifetimes of 4000–15,000   h [49] . Multistage amplifier chains can deliver 1.5  MW [50] with efficiency between 60% and 70%. Klystrons can deliver round 1   MW with a 30,000-h life with efficiencies of ∼65% [51].

At high harmonics of the ion cyclotron frequency, around 300   MHz, the fast wave (also known as whistler or helicon wave) is excited. Calculations imply an improvement in CD efficiency for these waves by factors of two and four compared to NBCD and ECCD [52], especially when launched from a large poloidal angle [53]. Experimental confirmation of these calculations is still awaited.

The coaxial transmission lines (TL) have efficiencies of around 80% [54] and require cooling for CW operation. Lengths of 100   m are common between the antenna and generator, with bends in the TL, requiring internal tuning stubs. Close to the antenna, where disruption forces are significant, mechanical support of the inner conductor is needed. The electric field in the TL limits the power that can be transmitted so the TLs are pressurized to increase voltage holding. The surface condition and wall material also influences the voltage holding; most high-power systems run TLs close to breakdown with frequent arcs, necessitating detection and suppression mechanisms [55]. Several options, varying in technological readiness from one to nine, are available for arc detection [56–58], but all have disadvantages such as false positives. The harsh radiation environment creates problems for optical fibres due to radiation-induced absorption and luminescence [59] that can be minimized by doping and thermal annealing [60]. Present mineral insulators will be acceptable for ITER [61] but not necessarily for a power plant. For temperature monitoring an alternative to thermocouples is the Fibre Bragg Grating [62], but the Bragg-resonant wavelength is known to shift under neutron bombardment [63], which may lead to spurious readings.

An antenna is needed to launch the RF power into the plasma and must be positioned within a few centimetres of the cut-off density in the plasma edge to obtain efficient coupling. This requirement is inconvenient from the perspective of a power plant as it demands materials resistant to first-wall conditions and the complication of maintaining electrical contact for a moveable antenna to follow movement in the plasma. For high CD efficiency, the antenna should provide good directivity and spectral purity.

The conventional, strap-based antenna [40] (Fig. 17.6), introducing a massive structure that displaces the tritium breeding blanket area, is a major weakness. The maximum power that can be radiated is determined by limitations on the electric field between straps of around 2   MV   m⁻¹ parallel to the tokamak magnetic field and 3   MV   m⁻¹ perpendicular to the field [64], resulting in a small number of straps spaced by centimetres at low frequency, giving reduced spectral purity and directivity. Increasing the frequency into the hundreds of MHz range reduces the spacing, but then coaxial feeders and straps become unfeasible due to space limitations within the port. A switch to waveguide launchers and transmission offers a possible resolution but require developments of advanced concepts such as the folded waveguide launcher [56]. At the lower end of this spectrum (∼200   MHz) the waveguide cut off leads to larger-sized components that are less easily integrated.

An alternative for launching the fast wave is the combline travelling wave antenna [65], a compact device as the poloidal dimension of the antenna can be less than the free space wavelength (Fig. 17.7). Apart from the advantage of simplicity, the travelling wave production of the combline is optimized for a large number of elements, each with a relatively low power loading. The loading and power transfer to the plasma is only weakly sensitive to the antenna–plasma gap, making it suitable for H-mode plasmas with ELMs. This design also offers a reduction in complexity and reflected power giving an improvement in availability. A combline antenna was successfully tested at the JFT-2M tokamak at 200   MHz frequency and up to 400-kW power [66]. The results showed that the fast wave was successfully launched but no CD was observed due to low damping of the wave [67].

Figure 17.7. Comb array antenna [67].

Formation of an 'RF sheath' at the plasma SOL accelerates ions towards the first-wall generating localized thermal loading, increased sputtering producing impurities in the plasma and increased particle convection at the plasma edge. It can also redistribute the SOL density, affecting the coupling efficiency between antenna and plasma. A Faraday Screen, a series of bars or slotted screen, placed between the strap array and the plasma filters out the parallel component of the electric field, reducing the effect. The alternative 'field aligned antenna' [69] (Fig. 17.8) where the strap is aligned perpendicular to the total magnetic field, eliminates the need for the Faraday Screen. This arrangement has proven successful in reducing impurities in Alcator C–mod, implying a reduction in sputtering through reduced sheath potential [70].

Figure 17.8. Field-aligned antenna MIT [68].

The near-term development program is ITER. RF sources are being developed to deliver 2.5   MW (VSWR   =   2) CW in the 35–65   MHz frequency band and 3   MW (VSWR   =   1.5) CW in the 40–55   MHz band. The sources will use two parallel amplifier chains with a combining circuit. The specifications of high power and VSWR are challenging and there are no high power tubes available that have been used in these conditions [40].

Each ITER antennae will couple 10–12   MW into the plasma. RF modelling has shown the importance of adequate grounding of the plug to the port extension [71] and a mechanical implementation of contacts compatible with installation and removal has been developed [72], together with sliding contacts to enable maintenance [73]. Voids between nearby blanket modules and vacuum vessel may influence the RF characteristics [74]. Given the limitations of the strap antenna to couple significant amounts of power, the ITER program appears to have little relevance to power plant development.

The EUROfusion consortium is investigating a combline, low-power array antenna for fast wave IC on the EU DEMO [64]. This device operates with an electric field well below the breakdown limit and so also reduces the sheath issue. Integrated within the blanket structure and sharing its cooling system, the antenna would have to withstand the first-wall environment for the lifetime of the blanket. Periodic RF feeds would be required and this would have some impact on the TBR but, depending upon design, the installation may have minimal effect. Presumably the antenna will have to be manufactured from the first-wall material and it should be noted that TBR is expected to be sensitive to wall thickness in front of the breeder blanket.

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How to Design a Multistage Class a 1 Watt Amplifier

Source: https://www.sciencedirect.com/topics/engineering/multistage-amplifier

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